Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc.
Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems;
Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers;
Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.
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